• Be involved in designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures, as well as driving physical design.
• Develop memory architectures and circuit implementation techniques. Schematic entry, simulation of major blocks, layout planning, layout supervision and full verification and model generation.
• 5+ years of academic or professional experience designing embedded memories for SoC applications.
• SRAM/Register File architectures and advanced custom circuit implementations.
• Full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
• Physical implementation (layout) and layout supervision.
• Advanced technology nodes.
Preferred qualifications in the following areas are a plus:
Experience with tight pitch-matched memory layout designs.
Understanding of physical implementation impact on circuit performance.
Familiarity with variation-aware design in nano-meter technology nodes.
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