Contribute to the leading edge memory controller design of Bitmain.
The coverage of the controller include DDR5/GDDR6/HBM.
Job responsibilities may include but not be limited to:
- Interface with system architecture team to refine current products and define the next generation products
- Develop micro-architecture based on the High Level Architectural definition
- Develop logic IP block
- Close involvement in the design verification effort as well as design STA.
- Active involvement in hardware modeling and simulation, random and focused stimulus generation and coverage analysis.
Master's Degree in Computer Engineering or Electrical Engineering preferred.
- 8+ years of logic design experience working on complex design blocks.
- experience with memory technologies like DDR3/DDR4 memory controller designs
- Exceptional communication, teamwork skills both verbal and written
- Knowledgeable in high speed ASIC design
- Knowledgeable in multiple clock domain designs
- Knowledgeable in IP DFT aspects
- Knowledgeable in static timing closure, understanding of DC timing reports
- Expertise in low-power design, coarse/fine grain clock gating
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