IC Layout Engineer

  • Bitfury
  • Sophia Antipolis, France
  • Jul 27, 2018
Full time Design

Job Description

Job description

The Bitfury Group is a technology company in Silicon Valley with offices in the US, Europe and Asia. We develop and deliver both the software and the hardware solutions necessary for businesses, governments, organisations and individuals to securely move an asset across the Blockchain. The expertise of The Bitfury Group ensures successful, easy, fast, secure and cost-effective connectivity to the Blockchain.

Job purpose

We are looking for experienced (> 10 years) IC layout engineer to work with our different product lines. The candidate must have a very good knowledge of Analog/Memory techniques in advance process along with layout tools and methodologies used in all layout design phases. The experienced candidate will have to drive and deliver major contributions at both top and block level of our products.

Duties And Responsibilities
  • Delivering layout blocks and/or macros according to top floorplan strategy and circuit specification as well on tight schedule
  • Participating to Ips/SOC distribution including power supply strategy, signals and distribution between blocks and toplevel
  • Running all physical verifications as DRC/LVS/DFM/... and parasitic extractions when needed in order to achieve high quality layout deliveries (state of the art integration, all foundry rules and design constraints validated, leading to high performance blocks)
  • Having a strong focus on design for quality with the maximum integration possible
  • Must be able to leverage your layout expertise to write technical guidelines
  • 10+ years of experience with Analog/Memory/HF/Custom Digital layout activities in complex ICs
  • Strong exposure with FinFet technology and its constraints for layout techniques and qualities
  • Expert in layout design tools such Cadence Virtuoso
  • Expert but not mandatory in analog and/or digital place&route tools such as VCP/VSR/Innovus
  • Expert in layout verification like PVS (Cadence Virtuoso) or Calibre (Mentor Graphics)
  • Experience in physical implementation in Analog/Memory/HF at Ips and/or SOC level with strong out of box thinking capabilities
  • Ability to develop skill codes/techniques as necessary to improve productivity and reliability
  • Ability to meet agreed schedules blocks/IPs
  • Fluent in English
Location and working conditions
  • The work office is based in Sophia Antipolis but it would be possible work remotely with occasional travel as long as the project permitted it and schedules are respected.
  • The work is based on 40 hours a week but could require more on special occasion to meet define targets.
  • It may be required to travel to meet other team or providers in some occasion.
  • Temporary contract (at least 3 months).